1. Field
The present disclosure relates generally to a circuit layout, and more particularly, to a system on a chip (SOC) design with critical technology pitch alignment.
2. Background
A pitch is the distance between the same type of adjacent elements. To achieve cost, power, and performance benefits of scaling a pitch by x %, an area scaling of approximately x2% should be obtained. For example, to achieve the full cost, power, and performance benefits of a 70% pitch scaling, approximately a 50% area scaling should be obtained. However, given a requirement to obtain an x2% area scaling, an x % pitch scaling may not provide the best cost, power, and performance benefits. As such, methods and apparatuses are needed for determining a pitch or pitch scaling given a desired area scaling.